LPC2468FBD208

Product Summary

The LPC2468FBD208 is a microcontroller. The LPC2468FBD208 has 512 kB of on-chip high-speed flash memory. This flash memory includes a special 128-bit wide memory interface and accelerator architecture that enables the CPU to execute sequential instructions from flash memory at the maximum 72 MHz system clock rate. This feature is available only on the LPC2468FBD208 ARM microcontroller family of products. The LPC2468FBD208 can execute both 32-bit ARM and 16-bit Thumb instructions. Support for the two instruction sets means engineers can choose to optimize their application for either performance or code size at the sub-routine level.

Parametrics

LPC2468FBD208 absolute maximum ratings: (1)VDD(3V3), supply voltage (3.3 V): 3.0 to 3.6 V; (2)VDD(DCDC)(3V3), DC-to-DC converter supply voltage (3.3 V): 3.0 to 3.6 V; (3)VDDA, analog 3.3 V pad supply voltage: -0.5 to +4.6 V; (4)Vi(VBAT), input voltage on pin VBAT: -0.5 to +4.6 V; (5)Vi(VREF), input voltage on pin VREF: -0.5 to +4.6 V; (6)VIA, analog input voltage: -0.5 to +5.1 V; (7)VI, input voltage: -0.5 to +6.0 V; (8)IDD, supply current: 100 mA; (9)ISS, ground current: 100 mA; (10)Tstg, storage temperature: -65 to +150℃; (11)Ptot(pack), total power dissipation (per package: 1.5W; (12)Vesd, electrostatic discharge voltage: -2000 to +2000 V.

Features

LPC2468FBD208 features: (1)ARM7TDMI-S processor, running at up to 72 MHz; (2)512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access; (3)98 kB on-chip SRAM includes: 64 kB of SRAM on the ARM local bus for high performance CPU access; 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM; (4)Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention; (5)EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as Single Data Rate SDRAM; (6)Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.; (7)General Purpose AHB DMA controller (GPDMA) that can be used with the SSP, I2S-bus, and SD/MMC interface as well as for memory-to-memory transfers.

Diagrams